Universal analog-to-analog FPGA module

The structure of FPGA module

FPGA module

The structure and appearance of the module are shown in the pictures.
As follows from the block diagram, the incoming signal in differential form is sent to a 12-bit ADC of the ADC12020 type, after which it is sent for processing to the Altera MAX10 chip. The processed signal is sent to a DAC of the DAC7821 type, from where it is received in unipolar form for further actions.

The clock signal is formed on the basis of a generator from Taitien type TYETBCSANF, which has a high frequency setting accuracy and stability, which allows both emulating signals inside the MAX10 at different frequencies, and setting filter bands with high accuracy.

The module is designed for various operations on analog signals, including the transformation of the spectrum. The module can be conveniently configured and integrated into the analog circuit by using a special circuit design solution.

The module uses Altera MAX10 10Mxx chips in the EQFP144 case. Depending on the complexity of the task, chips from 10M02SCE144 to 10M50SCE144 can be installed on the same board, which allows you to optimize the cost.

The module is designed as a board with 2x19 pins on the sides with a 100 mil (2.54 mm) pitch. That means the module can either be simply soldered, or (better) can be installed in the connector on the motherboard.

The programming connector is not built into the module, but the module has contacts to which it can be connected. A special adapter that has a plug for connecting the module, an IDC programming connector (JTAG), and analog input and output connectors can be included in the delivery package.

The module can be managed using the SPI interface. The demo firmware is provided.

Main features

Core supply voltage                -           3.3 V
ADC/DAC reference voltage          -           0.5 ... 5 V
Peripheral supply voltage          -           3.3 ... 5 V
Total current consumption          -           no more than 300 mA (depends on the type of chip and complexity of the structure)

Frequency of the reference quartz oscillator - 50 MHz

Operating frequency band, not less than 20 Hz.... 1 MHz (depends on the clock speed)